IBIS Macromodel Task Group Meeting date: 30 April 2019 Members (asterisk for those attending): ANSYS: Dan Dvorscak Curtis Clark Cadence Design Systems: * Ambrish Varma Ken Willis Intel: * Michael Mirmak Keysight Technologies: * Fangyi Rao Radek Biernacki Ming Yan Stephen Slater Maziar Farahmand Mentor, A Siemens Business: * Arpad Muranyi Micron Technology: * Randy Wolff * Justin Butterfield SiSoft (Mathworks): * Walter Katz * Mike LaBonte SPISim: * Wei-hsing Huang Teraspeed Labs: * Bob Ross The meeting was led by Arpad Muranyi. Mike LaBonte took the minutes. -------------------------------------------------------------------------------- Opens: - Curtis unavailable, Mike will take minutes. ------------- Review of ARs: - Mike L. to send the response to the authors of BIRD198. - Done - Arpad to send BIRD197.3 draft_3.2 to Ambrish and ATM. - Done -------------------------- Call for patent disclosure: - None. ------------------------- Review of Meeting Minutes: Arpad asked for any comments or corrections to the minutes of the April 16 meeting. Mike L. moved to approve the minutes. Michael M. seconded the motion. There were no objections. ------------- New Discussion: Response to JEITA authors of BIRD198: Mike said JEITA had replied, affirming the three points stating our understanding of the intent of their BIRD. They will take the time to understand IBIS 7.0 more fully before replying to the more detailed portion of our letter. This may take some time due to a holiday in Japan. BIRD197.3_draft_3.1 (DC_Offset): Ambrish suggested the aim of the new feature should not be to make time domain and statistical result comparable. Fangyi agreed. Arpad noted that in time domain, Ignore_Bits would need to be sufficient to assure centering of the voltage. Ambrish said people would not be experimenting with Ignore_Bits to make the two results match. Arpad asked if there was a way to get a better match. Fangyi said the model can return an arbitrary offset and then compensate in the output waveform. That would cause trouble for statistical simulation. Mike L. asked if that was a pathological case that was simple to avoid. Fangyi said yes. Walter asked why we would allow DC_Offset to be Type Out. When would it change? Fangyi said a DQ model for example would have its own comparator subtracting the DC offset. Walter said the EDA tool creates the DC offset. Under what circumstances would the DLL change it? Arpad gave an example using specific voltages. The shift would be at the decision point. Walter asked what the EDA tool would do with that information. Ambrish asked if the controller could itself measure the DC offset if the EDA tool did not. Walter said given a DC offset, the model could have a DQ Vref register with a resolution of 5mV, and the closest DC offset might happen to be 4.8V. That would produce a signal not centered at 0V, which would go through the DFE. The DLL cannot change the actual DC offset. Arpad summarized, saying we know why DC offset needs to be an input, but the question is why return it. Ambrish thought it would be interesting to return it because the model might provide interesting data. Walter said the DLL might report an uncentered signal, but he suggested that it could be a separate parameter name. Ambrish asked if the model could have more information than the tool had. Walter said no, except that the model could report an inability to center exactly. Arpad said the DLL output was a centered waveform, and the DC offset it used might be needed to display it correctly. Fangyi noted that statistical analysis does not call GetWave. Walter said the latch waveform was assumed to produce a 1 if above 0V, etc., and that was all GetWave would return. Arpad asked if that waveform was required to have no DC component. In that case it should return a DC offset value separately. Walter said the waveform was above zero. Ambrish said for differential serdes signals the waveform would enter and exit the model centered around 0V. The EDA tool doesn't shift it after it emerges from Rx GetWave. For single ended signaling the same needed to be applied. Before displaying the latch signal the tool must shift to center it. Walter said the model did not shift the waveform, the latch would have a threshold and the waveform output would be relative to that. Fangyi asked if that meant it would be perfectly compensated. Walter said it might not be perfect. Arpad asked if the model needed to return the amount of centering. Walter said no, the output would be centered and would be processed assuming such. Walter agreed that having DC_Offset Out would be OK if the DLL did not change the output waveform. Ambrish asked if the waveform in was centered around 0V, what would the output be centered around? Walter gave an example with DC_Offset of 0.9V. The waveform in was centered around 0.9v. that would then be offset to -.1 to +.1, and then scaled by an amplifier, etc. The signal might be between 0.2 to 0.8 and the threshold might be 0.5V. There may be digitizers too. Ambrish said he understood that the input would be centered around 0V, asking what the output would be. Walter said the output would center around the latch threshold. Fangyi believed Walter was suggesting the waveform should be the physical waveform minus the threshold voltage. Ambrish said it would be no different for single ended versus differential. Walter said that was correct. Arpad said the output signal would always center around zero, even though 0 actually meant the threshold voltage. He also noted the EDA tool would shift it for display. Arpad asked if we wanted to know the actual threshold used, and if so would it need to be passed. Walter said comparing the input and output could be done subtracting only the DC offset, to see what the DLL did. Ambrish said the model would figure the threshold if D2A and A2D are done. Fangyi said he still felt a DC_Offset out was needed. Ambrish still felt that the threshold should be a factor. Mike L. noted that AMI models do not output ones and zeros. What must the RX output be for the EDA tool to use it? Arpad asked why we were just now having this question. Walter said we did have the question for PAM4, with its multiple thresholds. Arpad asked if for PAM4 the same threshold levels are used. Ambrish said an analog signal went both in and out. There were no thresholds. Walter said PAM4 has 3 thresholds, which had to be known. Michael M. said he hoped to address jitter amplification and Tx/Rx partitioning could be addressed next time. - Mike L.: Motion to adjourn. - Michael M.: Second. - Arpad: Thank you all for joining. ------------- Next meeting: 7 May 2019 12:00pm PT ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives